SILICON METRICS INTRODUCES CHARACTERIZATION AND MODELING TOOL FOR EMBEDDED-COMPILED MEMORY

SiliconSmart MR™ is Industry's First Fully Automatic Commercial Solution for Embedded-Compiled Memory

Austin, TX - June 1, 2001 - Silicon Metrics Corporation today introduced SiliconSmart MR™, the first fully automated characterization and modeling solution for embedded-compiled memory elements. SiliconSmart MR allows system-on-chip (SoC) design groups to rapidly and accurately characterize compiled memory and generate the models needed for floorplanning and timing or power analysis.

In creating highly integrated SoCs, design groups are combining increasing amounts of on-chip memory with processor cores and interface blocks. Designers typically use memory compilers to create the wide variety of memory configurations required in complex SoC designs. Yet, the vast number of configurations available for each memory makes it impossible for the compiler vendor to completely characterize all possible variations in advance. For design teams, the lack of complete characterization limits their ability to effectively complete floorplanning and sign-off. As a result, design groups either face lengthy delays waiting for a specialist to characterize a new memory block and create the associated models, or they risk using inaccurate models that could result in time-consuming and expensive silicon re-spins. Now, SiliconSmart MR offers automated capabilities that allow design groups to complete characterization and modeling quickly and accurately.

"Before the availability of SiliconSmart MR, a dedicated characterization engineer would need weeks to generate memory models. This limits the engineer to working on only a few designs at a time," said Chris Collins, EDA Manager at Dallas Semiconductor. "With SiliconSmart MR, all our design teams have the flexibility to explore multiple performance or power related issues earlier in the process and use those same models during sign-off. SiliconSmart MR has helped accelerate our design cycle and increase the performance of our designs."

"Early adoption of new foundry process technology and the use of embedded memory are key factors in achieving ever increasing levels of integration and performance in our high-end networking devices," said Steve Majors, director of ASIC/SoC design kits at Mindspeed Technologies, the Internet infrastructure business of Conexant Systems. "SiliconSmart MR provides the capability and capacity to quickly and accurately characterize specific memory instances and automatically generate high quality models real-time with process changes."

Simplified Use, Accurate Timing and Power Characterization

SiliconSmart MR automates the error-prone, lengthy process typically required for characterizing embedded memories. With SiliconSmart MR, SoC designers need no specialized knowledge regarding simulators, process technologies, or compiled memory architecture to completely characterize their compiled memories. SoC designers use the tool's graphical user interface to launch the automatic characterization, model creation, and verification capabilities of SiliconSmart MR.

Using patent-pending measurement and acquisition techniques, SiliconSmart MR automatically characterizes timing and power for whole memory netlists rather than requiring editing or cutting of large netlists to smaller sizes as required with earlier approaches. The ability for SiliconSmart MR to consume whole netlists is paramount for accurate measurement of timing and power characteristics of complied memories. The tool stores characterization results in a single measurement database that simplifies model generation. Finally, SiliconSmart MR automatically generates complete Synopsysâ Libertyä (.lib) models and provides automatic model verification. As a result of the automated capabilities of SiliconSmart MR, designers themselves are able to complete tasks that previously required the expertise of a characterization specialist.

Availability

SiliconSmart MR supports single- and dual-port RAMs, ROMs and register files. The tool currently supports a broad range of timing measurements including cycle and access time; clock minimum pulse width and contention; setup and hold for address lines, chip enable, write enable and data; and tri-state measurements. Support for power measurements will be available in a subsequent release. SiliconSmart MR will be available in Q3 of 2001 for Sun Solaris workstations.

About Silicon Metrics Corporation

Silicon Metrics Corporation is a privately held company based in Austin, Texas. The company has offices in Austin and San Jose, California and a research and testing facility in Research Park at Mississippi State University. Marubeni Solutions represents Silicon Metrics Corporation in Japan. Company investors include Austin Ventures, Cadence Design Systems, Synopsys, Inc., Current Ventures and Needham Capital Partners. The Silicon Metrics team brings decades of combined electrical engineering and electronic design automation (EDA) experience to bear on the challenge of eliminating silicon re-spins caused by timing flaws. For more information, visit Silicon Metrics online at www.siliconmetrics.com.

Silicon Metrics, the Silicon Metrics logo, and SiliconSmart are trademarks or registered trademarks of Silicon Metrics Corporation. All other company or product names are the trademarks or registered trademarks of their respective owners.

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